KM681002B Datasheet | Samsung Semiconductor

PRELIMINARY KM681002B, KM681002BI Document Title 128Kx8 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out. Operated at mercial and Industrial Temperature Range. Preliminary PRELIMINARY CMOS SRAM Revision History Rev No. Rev. 0.0 Rev.1.0 .. Rev.2.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1. Replace Design Target to Preliminary. Release to Final Data Sheet. 2.1. Delete Preliminary 2.2. Delete 32-SOJ-300 package 2.3. Delete L-version. 2.4. Delete Data Retention Characteristics and Waveform. 2.5. Add Capacitive load of the test environment in A.C test load 2.6. Change D.C characteristics Previous spec. Changed spec. Items (8/10/12ns part) (8/10/12ns part) Icc 160/150/140m A 160/155/150m A Isb 30m A 50m A Draft Data Apr. 1st, 1997 Jun. 1st, 1997 Remark Design Target Preliminary Feb. 25th, 1998 Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquart ers. -1- Rev 2.0 February 1998 PRELIMINARY KM681002B, KM681002BI 128K x 8 Bit High-Speed CMOS Static RAM Features - Fast Access Time 8,10,12ns(Max.) - Low Power Dissipation Standby (TTL) : 50 m A(Max.) (CMOS) : 10 m A(Max.) Operating KM681002B - 8 : 160 m A(Max.) KM681002B - 10 : 155 m A(Max.) KM681002B - 12 : 150 m A(Max.) - Single 5.0V ± 10% Power Supply - TTL patible Inputs and Outputs .. - I/O patible with 3.3V Device - Fully Static Operation - No Clock or Refresh required - Three State Outputs - Center Power/Ground Pin Configuration - Standard Pin Configuration KM681002BJ : 32-SOJ-400 KM681002BT: 32-TSOP2-400F Preliminary PRELIMINARY CMOS...