KS57P0504 Datasheet | Samsung Semiconductor

OVERVIEW PRODUCT OVERVIEW The KS57C0502/C0504 single-chip CMOS microcontroller has been designed for high-performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). The KS57P0504 is the microcontroller which has 4 Kbyte one-time-programmable ROM and the functions are the same to KS57C0502/C0504. With a four-channel parator, eight LED direct drive pins, serial I/O interface, and its versatile 8-bit timer/counter, the KS57C0502/C0504 offers an excellent design solution for a wide variety of general-purpose applications. Up to 24 pins of the 30-pin SDIP package can be dedicated to I/O. Five vectored interrupts provide fast response to internal and external events. In addition, the KS57C0502/C0504's advanced CMOS technology provides for very low power consumption and a wide operating voltage range - all at a very low cost. FEATURES SUMMARY MEMORY 512 × 4-bit data memory (RAM) 2048 × 8-bit program memory (ROM):KS57C0502 4096 × 8-bit program memory (ROM):KS57C0504 24 I/O PINS I/O: 18 pins, including 8 high current pins Input only: 6 pins PARATOR 4-channel mode: Internal reference (4-bit resolution) 16-step variable reference voltage 3-channel mode: External reference 150 m V resolution (worst case) 8-BIT BASIC TIMER Programmable interval timer Watch-dog timer 8-BIT TIMER/COUNTER Programmable interval timer External event counter function Timer/counter clock output to TCLO0 pin WATCH TIMER Time interval generation: 0.5 s, 3.9 ms at 4.19 MHz 4 frequency outputs to BUZ pin 8-BIT SERIAL I/O INTERFACE 8-bit transmit/receive mode 8-bit receive-only mode LSB-first or MSB-first transmission selectable Internal or external clock source BIT SEQUENTIAL CARRIER Supports 16-bit serial data transfer in arbitrary format INTERRUPTS Two external interrupt vectors Three internal interrupt vectors Two quasi-interrupts MEMORY-MAPPED I/O STRUCTURE Data memory bank 15 TWO POWER-DOWN MODES Idle mode: Only CPU clock stops Stop mode: System clock stops...