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M464S6554BTS - SDRAM Unbuffered SODIMM

Description

Pin Name A0 ~ A12 BA0 ~ BA1 DQ0 ~ DQ63 CLK0 ~ CLK1 CKE0 ~ CKE1 CS0 ~ CS1 RAS CAS Select bank Data input/output Clock input Clock enable input Chip select input Row address strobe Column address strobe Function Address input (Multiplexed) WE DQM0 ~ 7 VDD VSS SDA SCL DU NC Pin Name Write enable DQM Po

Features

  • Input signals are stable CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≤ VI.

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Full PDF Text Transcription

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256MB, 512MB Unbuffered SODIMM SDRAM SDRAM Unbuffered SODIMM 144pin Unbuffered SODIMM based on 512Mb B-die 64-bit Non ECC Revision 1.2 March 2004 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.2 March 2004 256MB, 512MB Unbuffered SODIMM Revision History Revision 1.0 (January, 2004) - First release Revision 1.1 (February, 2004) - Corrected typo. Revision 1.2 (March. 2004) - Corrected package dimension. SDRAM Rev. 1.
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