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PC100 - PC100 SDRAM MODULE Preliminary

General Description

The Samsung KMM366S1623CT is a 16M bit x 64 Synchronous Dynamic RAM high density memory module.

The Samsung KMM366S1623CT consists of sixteen CMOS 8M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil package and a 2K EEPROM in 8-pin TSSOP package on a 168-pin glass-epoxy substrate.

Key Features

  • d tCCD = 2CLKs tRC ≥ tRC(min) CKE ≤ 0.2V 3 2 920 760 mA 96 32 32 320 160 760 760 2,000 16 760 mA 720 mA mA 2 1 mA mA mA Active standby current in non power-down mode (One bank active) Operating current (Burst mode) Ref.

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📁 Similar Datasheet

Part Number Description Manufacturer
PC100-222-620 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module Siemens Semiconductor Group
PC100-222-620 3.3 V 8M x 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M x 64/72-Bit 2 Bank SDRAM Module Siemens Semiconductor Group
PC100-222-620 3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules Siemens Semiconductor Group
PC100-222-620 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module Siemens Semiconductor Group
PC100-323-620 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module Siemens Semiconductor Group

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Full PDF Text Transcription (Reference)

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KMM366S1623CT KMM366S1623CT SDRAM DIMM Preliminary PC100 SDRAM MODULE 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION The Samsung KMM366S1623CT is a 16M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung KMM366S1623CT consists of sixteen CMOS 8M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil package and a 2K EEPROM in 8-pin TSSOP package on a 168-pin glass-epoxy substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The KMM366S1623CT is a Dual In-line Memory Module and is intended for mounting into 168-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock.