S3C7295 Datasheet | Samsung Semiconductor

OVERVIEW OVERVIEW PRODUCT OVERVIEW The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-704-dot LCD direct drive capability, and flexible 8-bit timer/counter, the S3C7295 offers an excellent design solution for a mid-end LCD game. Up to 8 pins of the 80-pin QFP package can be dedicated to I/O. Six vectored interrupts provide fast response to internal and external events. In addition, the S3C7295's advanced CMOS technology provides for low power consumption. The S3C7295 microcontroller is also available in OTP (One Time Programmable) version, S3P7295. S3P7295 microcontroller has an on-chip 16K-byte one-time-programable EPROM instead of masked ROM. The S3P7295 is parable to S3C7295, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW S3C7295/P7295 FEATURES Memory - - 256 × 4-bit RAM (excluding LCD display RAM) 16,384 × 8-bit ROM Memory-Mapped I/O Structure - Data memory bank 15 Power-Down Modes - - - Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Sub system clock stop mode 8 I/O Pins - I/O: 8 pins LCD Controller/Driver - - - - 44 segments and 16 mon terminals (8, 12 and 16 mon selectable) Internal resistor circuit for LCD bias Voltage doubler All dot can be switched on/off - 8-bit Basic Timer - - 4 interval timer functions Watch-dog timer Instruction Execution Times - 8-bit Timer/Counter - - - Programmable 8-bit timer Arbitrary clock output (TCLO0) Inverted clock output (TCLO0) Operating Temperature - - 40 °C to 85 °C - 0.95, 1.91, 15.3 µs at 4.19 MHz (main) 122 µs at 32.768 k Hz (subsystem) - Oscillation Sources - - - Crystal, ceramic, or RC for main system clock Crystal oscillator for subsystem clock Main system clock frequency: 4.19 MHz (typical) Subsystem clock frequency: 32.768 k Hz CPU clock divider circuit (by 4, 8, or 64) Watch Timer - - - Time interval generation: 0.5 s, 3.9...