K4E640812B Datasheet | Samsung Semiconductor

DESCRIPTION This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 8Mx8 EDO Mode DRAM family is fabricated using Samsung ′s advanced CMOS process to realize high band-width, low power consumption and high reliability. FEATURES - Part Identification - K4E660812B-JC/L(3.3V, 8K Ref., SOJ) - K4E640812B-JC/L(3.3V, 4K Ref., SOJ) - K4E660812B-TC/L(3.3V, 8K Ref., TSOP) - K4E640812B-TC/L(3.3V, 4K Ref., TSOP) - Extended Data Out Mode operation - CAS-before-RAS refresh capability - RAS-only and Hidden refresh capability - Self-refresh capability (L-ver only) - Fast parallel test mode capability - LVTTL(3.3V) patible inputs and outputs - Active Power Dissipation Unit : m W Speed -45 -50 -60 - Refresh Cycles Part NO. K4E660812B- K4E640812B Refresh cycle 8K 4K Refresh time Normal 64ms L-ver 128ms RAS CAS W Control Clocks VBB Generator Vcc Vss - Early Write or output enable controlled write - JEDEC Standard pinout - Available in Plastic SOJ and TSOP(II) packages - +3.3V±0.3V power supply 4K 468 432 396 8K 360 324 288 FUNCTIONAL BLOCK DIAGRAM Refresh Control Refresh Counter Memory Array 8,388,608 x 8 Cells Sense Amps & I/O - Access mode & RAS only refresh mode : 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.) CAS-before-RAS & Hidden refresh mode : 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.) ¡ Ü Refresh Timer Row Decoder Data in Buffer DQ0 to DQ7 Data out Buffer OE Performance Range Speed -45 -50 -60 t RAC 45ns 50ns 60ns t CAC 12ns 13ns 15ns t RC 74ns 84ns 104ns t HPC 17ns 20ns 25ns A0~A12 (A0~A11)- 1 A0~A9 (A0~A10)- 1 Row Address Buffer Col. Address Buffer...