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K9XXG08UXM-P - 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory

Download the K9XXG08UXM-P datasheet PDF. This datasheet also covers the K9X variant, as both devices belong to the same 256m x 8 bit / 128m x 16 bit nand flash memory family and are provided as variant models within a single manufacturer datasheet.

Description

Offered in 256Mx8bit or 128Mx16bit, the K9K2GXXX0M is 2G bit with spare 64M bit capacity.

Its NAND cell provides the most costeffective solution for the solid state mass storage market.

Features

  • Voltage Supply -1.8V device(K9K2GXXQ0M): 1.7V~1.95V -3.3V device(K9XXGXXUXM): 2.7 V ~3.6 V.
  • Organization - Memory Cell Array -X8 device(K9K2G08X0M) : (256M + 8,192K)bit x 8bit -X16 device(K9K2G16X0M) : (128M + 4,096K)bit x 16bit - Data Register -X8 device(K9K2G08X0M): (2K + 64)bit x8bit -X16 device(K9K2G16X0M): (1K + 32)bit x16bit - Cache Register -X8 device(K9K2G08X0M): (2K + 64)bit x8bit -X16 device(K9K2G16X0M): (1K + 32)bit x16bit.
  • Automatic Program and Erase - Pag.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (K9X-XG0.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
K9XXG08UXA 1G x 8 Bit / 2G x 8 Bit / 4G x 8 Bit NAND Flash Memory Samsung semiconductor

Other Datasheets by Samsung Semiconductor

Part Number Description
K9XXG08UXM-E 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9XXG08UXM-K 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9XXG08UXM-Y 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9XXG16UXM-E 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9XXG16UXM-K 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory

Full PDF Text Transcription

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K9W4G08U1M K9K2G08Q0M K9K2G08U0M K9W4G16U1M K9K2G16Q0M K9K2G16U0M FLASH MEMORY Document Title 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory Revision History Revision No 0.0 0.1 History 1. Initial issue 1. IOL(R/B) of 1.8V device is changed. -min. Value: 7mA -->3mA -typ. Value: 8mA -->4mA Draft Date Aug. 30.2001 Nov. 5.2001 Remark Advance 0.2 1. 5th cycle of ID is changed : 40h --> 44h 1. Add WSOP Package Dimensions. 1. Add two-K9K2GXXU0M-YCB0/YIB0 Stacked Package 1. Min valid block of K9W4GXXU1M-YCB0/YIB0 is changed . - min. 4016 --> 4036 1. Each K9K2GXXX0M chip in the K9W4GXXU1M has Maximum 30 Jan. 23. 2002 0.3 0.4 0.5 May.29.2002 Aug.13.2002 Aug. 22.2002 0.6 Nov. 07.2002 invalid blocks. 2.
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