LH52258A Datasheet PDF - Sharp Electrionic Components CMOS 32K x 8 Static RAM Specs

LH52258A - CMOS 32K x 8 Static RAM

Datasheet Summary

Description

The LH52258A is a high-speed 262,144 bit static RAM organized as 32K × 8.

A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory cells.

This RAM is fully static in operation.

Features

Fast Access Times: 20/25 ns.
Low-Power Standby when Deselected.
TTL Compatible I/O.
5 V ± 10% Supply.
Fully-Static Operation.
JEDEC Standard Pinout.
Packages: 28-Pin, 300-mil DIP 28-Pin, 300-mil SOJ.

Datasheet Details

Part number	LH52258A
Manufacturer	Sharp Electrionic Components
File Size	77.34 KB
Description	CMOS 32K x 8 Static RAM
Datasheet	LH52258A Datasheet
Additional preview pages of the LH52258A datasheet.

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Full PDF Text Transcription

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LH52258A FEATURES • Fast Access Times: 20/25 ns • Low-Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully-Static Operation • JEDEC Standard Pinout • Packages: 28-Pin, 300-mil DIP 28-Pin, 300-mil SOJ FUNCTIONAL DESCRIPTION The LH52258A is a high-speed 262,144 bit static RAM organized as 32K × 8. A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory cells. This RAM is fully static in operation. The Chip Enable (E) control permits Read and Write operations when active (LOW) or places the RAM in a low-power standby mode when inactive (HIGH). Standby power (ISB1) drops to its lowest level if E is raised to within 0.2 V of VCC. Write cycles occur when both Chip Enable (E) and Write Enable (W) are LOW.

Published: Mar 22, 2005 |