LH532000B-1 Datasheet PDF - Sharp Electrionic Components CMOS 2M (256K x 8/128K x 16) MROM Specs

LH532000B-1 - CMOS 2M (256K x 8/128K x 16) MROM

Datasheet Summary

Description

The LH532000B-1 is a CMOS 2M-bit mask-programmable ROM organized as 262,144 × 8 bits (Byte mode) or 131,072 × 16 bits (Word mode) that can be selected by BYTE input pin.

It is fabricated using silicon-gate CMOS process technology.

Features

262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode).
Access time: 120 ns (MAX. ).
Power consumption: Operating: 275 mW (MAX. ) Standby: 550 µW (MAX. ).
Mask-programmable control pin (for 40-pin DIP/40-pin SOP): Pin 1 = OE1/OE1/DC Pin 12 = OE/OE.
Static operation.
TTL compatible I/O.
Three-state outputs.
Single +5 V power supply.
Packages: 40-pin, 600-mil DIP 40-pin, 525-mil S.

Datasheet Details

Part number	LH532000B-1
Manufacturer	Sharp Electrionic Components
File Size	72.43 KB
Description	CMOS 2M (256K x 8/128K x 16) MROM
Datasheet	LH532000B-1 Datasheet
Additional preview pages of the LH532000B-1 datasheet.

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Full PDF Text Transcription

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LH532000B-1 FEATURES • 262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.) • Mask-programmable control pin (for 40-pin DIP/40-pin SOP): Pin 1 = OE1/OE1/DC Pin 12 = OE/OE • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Packages: 40-pin, 600-mil DIP 40-pin, 525-mil SOP 48-pin, 12 × 18 mm2 TSOP (Type I) DESCRIPTION The LH532000B-1 is a CMOS 2M-bit mask-programmable ROM organized as 262,144 × 8 bits (Byte mode) or 131,072 × 16 bits (Word mode) that can be selected by BYTE input pin. It is fabricated using silicon-gate CMOS process technology.

Published: Mar 22, 2005 |