LH53259 Datasheet | Sharp Corporation

FEATURES - 32,768 words × 8 bit organization - Access time: 150 ns (MAX.) - Low-power consumption: Operating: 137.5 m W (MAX.) Standby: 550 µW (MAX.) - Programmable output enable - Static operation - TTL patible I/O - Three-state outputs - Single +5 V power supply - Packages: 28-pin, 600-mil DIP 28-pin, 450-mil SOP 28-pin, 8 × 13.4 mm2 TSOP (Type I) - JEDEC standard EPROM pinout (DIP) DESCRIPTION The LH53259 is a mask-programmable ROM organized as 32,768 × 8 bits. It is fabricated using silicon-gate CMOS process technology. 28-PIN DIP 28-PIN SOP CMOS 256K (32K × 8) MROM PIN CONNECTIONS TOP VIEW NC A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE/OE A10 CE D7 D6 D5 D4 D3 53259-1 Figure 1. Pin Connections for DIP and SOP Packages 28-PIN TSOP (Type I) TOP VIEW OE/OE A11 A9 A8 A13 A14 VCC NC A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE D7 D6 D5 D4 D3 GND D2 D1 D0 A0 A1 A2 53259-7 Figure 2. Pin Connections for TSOP Package CMOS 256K MROM A14 A13 A12 A11 27 26 2 23 ADDRESS DECODER ADDRESS BUFFER A10 21 A9 24 A8 25 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 MEMORY MATRIX (32,768 x 8) COLUMN SELECTOR SENSE AMPLIFIER CE 20 CE BUFFER TIMING GENERATOR OUTPUT...