SiT95141 Datasheet | SiTime

Description The Cascade Clk So C™ Si T95141 is a single-chip MEMS clock generator optimized for the highest level of clock tree integration, consolidating multiple clock ICs and oscillators into a single device. Its low noise quad-PLL architecture and programmable output drivers provide up to 10 differential or 20 LVMCOS low jitter clock outputs. This Clk So C™ supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input to output frequency translation configurations from 8 k Hz to 2.1 GHz. The Si T95141 integrates Si Time’s third-generation Apex MEMS™ resonator to pletely eliminate the need for external discrete crystal references required by traditional clock generators. This integrated MEMS approach simplifies system design and improves system reliability by eliminating the clock generator’s dependency on quartz and associated quartz, along with all quartz related issues: - No crystal capacitive matching issues that impact clock synthesis accuracy - Always-reliable startup even at cold temperature and other harsh environmental conditions - Simpler PCB routing without noise coupling onto a crystal interface which can result in jitter degradation - No activity dips/frequency jumps inherent to quartz - 10 times more vibration resistant The Si T95141 is configured using a panion Cascade GUI software application to simplify clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility. Details of register mapping can be found in the Cascade Clk So C Si T9514x Register Map - Users Manual. Features - Quad Fractional-N PLLs with integrated VCO and loop filter, 120 fs RMS typical integrated phase jitter - Flexible input to output frequency translation with 4 inputs and 10 outputs - Wide output frequency...