SLX24C164P Overview
WP = VCC protects the upper half entire memory. The erase/write cycle is finished latest after 10 8 ms. second mand byte is a CSR and not CSW.
SLX24C164P datasheet by Siemens Semiconductor Group (now Infineon).
| Part number | SLX24C164P |
|---|---|
| Datasheet | SLX24C164P_SiemensSemiconductorGroup.pdf |
| File Size | 361.87 KB |
| Manufacturer | Siemens Semiconductor Group (now Infineon) |
| Description | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus/ Page Protection Mode |
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WP = VCC protects the upper half entire memory. The erase/write cycle is finished latest after 10 8 ms. second mand byte is a CSR and not CSW.
View all Siemens Semiconductor Group (now Infineon) datasheets
| Part Number | Description |
|---|---|
| SLX24C164 | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |
| SLX24C01 | 1/2 Kbit 128/256 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |
| SLX24C04 | 4 Kbit 512 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |
| SLX24C04P | 4 Kbit 512 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus/ Page Protection Mode |
| SLX24C0816 | 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |
| SLX24C0816P | 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus/ Page Protection Mode |
| SLX24C32 | 32 Kbit 4096 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |
| SLX24C64 | 64 Kbit 8192 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus |