HYM322030S
Description
DRAM Module (access time 60 ns) DRAM Module (access time 70 ns) DRAM Module (access time 60 ns) DRAM Module (access time 70 ns)
Semiconductor Group
HYM 322030S/GS-60/-70 2M × 32-Bit
The HYM 322030S/GS-60/-70 is a 8 M Byte DRAM module organized as 2 097 152 words by 32-bit in a 72-pin single-in-line package prising four HYB 5117800BSJ 2M × 8 DRAMs in 400 mil wide SOJ-packages mounted together with four 0.2 µF ceramic decoupling capacitors on a PC board. Each HYB 5117800BSJ is described in the data sheet and is fully electrical tested and processed according to SIEMENS standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The speed of the module can be detected by the use of four presence detect pins. The mon I/O feature on the HYM 322030S/GS-60/-70 dictates the use of early write cycles.
Pin Definitions and Functions Pin No. A0R-A10R A0C-A9C DQ0-DQ31 CAS0
- CAS3 RAS0, RAS2 WE...
