HYM328000GD- Datasheet | Siemens Semiconductor Group

8M × 32-Bit Dynamic RAM Module SMALL OUTLINE MEMORY MODULE HYM 328000GD-50/-60 Preliminary Information - - 8 388 608 words by 32-bit organization Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) Fast page mode capability with 35 ns cycle time (-50 version) 40 ns cycle time (-60 version) Single + 3.3 V (± 0.3 V) supply Low power dissipation max. 2016 m W active (-50 version) max. 1728 m W active (-60 version) LVCMOS - 3.6 m W standby LVTTL - 28.8 m W standby - - - - - - - - - - CAS-before-RAS refresh, RAS-only-refresh, Self Refresh 4 decoupling capacitors mounted on substrate All inputs, outputs and clock fully TTL patible 72 pin, dual read-out, one bank, Small Outline DIMM Module Utilizes four 8M × 8 -DRAMs (HYB 3165800T) 4096 refresh cycles / 64 ms Gold contact pad Semiconductor Group HYM328000GD-50/-60 8M x 32 SO-DIMM The HYM 328000GD -50/-60 is a 32 MByte DRAM module organized as 8 388 608 words by 32-bit in a 72-pin, dual read-out, small outline package prising four HYB 3165800T 8M × 8 DRAMs in 500 mil wide TSOPII-34 - packages mounted together with four 0.2 µF ceramic decoupling capacitors on a PC board. Each HYB 3165800T is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The density and speed of the module can be detected by the use of presence detect pins. These modules are ideal for portable systems applications where high memory capacity is needed. Ordering Information Type HYM 328000GD -50 HYM 328000GD -60 Pin Names A0-A11 A0-A10 DQ0 - DQ31 RAS0, RAS2 CAS0 - CAS3 WE Vcc Vss PD1 - PD7 N.C. Row Address Input Column Address Inputs Data Input/Output Row Address Strobe Column Address Strobe Read / Write Input Power (+3.3 Volt) Ground Presence Detect Pins No Connection Ordering Code on...