Datasheet Summary
Decoder for Program Delivery Control and Video Program System PDC / VPS Decoder
SDA 5648 SDA 5648X
CMOS IC
Features q Single-chip receiver for PDC data, broadcast either q q q q q q q q q q q
- in Broadcast Data Service Packet (BDSP) 8/30/2 according to CCIR teletext system B, or
- in dedicated line no. 16 of the vertical blanking interval (VPS) Reception of Unified Date and Time (UDT) broadcast in BDSP 8/30/1 Low external ponents count On-chip data and sync slicer I2C-Bus interface for munication with external microcontroller Selection of PDC/VPS operating mode software controlled by I2C-Bus register Pin and software patible to VPS Decoder SDA 5642 Supply voltage: 5 V ± 10 %...