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Standard EEPROM ICs
SLx 24C164 16 Kbit (2048 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus
Data Sheet 1998-07-27
http://www.Datasheet4U.com/
SLx 24C164 Revision History: Previous Version: Page Page (in previous (in current Version) Version) 3 5 11, 12 15 19 20 20 20
I2C Bus
Current Version: 1998-07-27 06.97 Subjects (major changes since last revision)
3 5 11, 12 15 19 20 20 20
Text was changed to “Typical programming time 5 ms for up to 16 bytes”. WP = VCC protects the upper half entire memory. The erase/write cycle is finished latest after 10 8 ms. Figure 11: second command byte is a CSR and not CSW. “Capacitive load …” were added. Some timings were changed. The line “erase/write cycle” was removed. Chapter 7.4 “Erase and Write Characteristics” has been added.