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SLA24C64 - 64 Kbit (8192 x 8 bit) Serial CMOS-EEPROM

Datasheet Summary

Description

Serial Clock (SCL) The SCL input is used to clock data into the device on the rising edge and to clock data out of the device on the falling edge.

Features

  • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes.
  • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64/P types only).
  • Low power CMOS.
  • VCC = 2.7 to 5.5 V operation.
  • Two wire serial interface bus, I2C-Bus compatible.
  • Three chip select pins to address 8 devices.
  • Filtered inputs for noise suppression with Schmitt trigger.
  • Clock frequency up to 400 kHz.
  • High pr.

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Datasheet preview – SLA24C64

Datasheet Details

Part number SLA24C64
Manufacturer Siemens
File Size 412.31 KB
Description 64 Kbit (8192 x 8 bit) Serial CMOS-EEPROM
Datasheet download datasheet SLA24C64 Datasheet
Additional preview pages of the SLA24C64 datasheet.

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Full PDF Text Transcription

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Standard EEPROM ICs SLx 24C64 64 Kbit (8192 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet Preliminary 1998-07-27 http://www.Datasheet4U.com/ SLx 24C64 Revision History: Previous Version: Page Page (in previous (in current Version) Version) 3 11, 12 21 24 24 I2C Bus Current Version: Preliminary 1998-07-27 05.98 Subjects (major changes since last revision) 3 11, 13 21 24 24 Text was changed to “Typical programming time 5 ms for up to 32 bytes”. The erase/write cycle is finished latest after 10 8 ms. The write or erase cycle is finished latest after 10 4 ms. The line “erase/write cycle” was removed. Chapter 8.4 “Erase and Write Characteristics” has been added.
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