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82S09 - 576-BIT BIPOLAR RAM

General Description

The 82S09 is a 576-Bit, Schottky clamped TTL, random access memory, organized as 64X9.

This organization allows byte manipulation of data, including parity.

Where parity is not monitored, the ninth bit can be used as a flag or status indicator for each word stored.

Key Features

  • open collector outputs, chip enable input, and a very low current PNP input structure to enhance memory expansion. During WRITE operation, the logic state of the device output follows the complement of the data input being written. This feature allows faster execution of WR.

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Datasheet Details

Part number 82S09
Manufacturer Signetics
File Size 168.74 KB
Description 576-BIT BIPOLAR RAM
Datasheet download datasheet 82S09 Datasheet

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Other Datasheets by Signetics

Part Number Description
82S10 1024 x 1-BIT BIPOLAR RAM
82S100 Field Programmable Logic Array
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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82S09 !iinn~tiC!i 576·BIT BIPOLAR RAM (64x9) _==_ .1 _ _ _ _ _---; JUNE 1975 DIGITAL 8000 SERIES TTL/MEMORY DESCRIPTION The 82S09 is a 576-Bit, Schottky clamped TTL, random access memory, organized as 64X9. This organization allows byte manipulation of data, including parity. Where parity is not monitored, the ninth bit can be used as a flag or status indicator for each word stored. With a typical access time of 30ns, it is ideal for scratch-pad, push-down stacks, buffer memories, and other internal memory applications in which cost and performance requirements dictate a wide data path in favor of word depth. The 82S09 is fully TTL compatible, and features open collector outputs, chip enable input, and a very low current PNP input structure to enhance memory expansion.