Datasheet4U.com

82S09 Datasheet PDF

Signetics 82S09

The 82S09 is a 576-Bit, Schottky clamped TTL, random access memory, organized as 64X9. This organization allows byte manipulation of data, including parity. With a typical access time of 30ns, it is ideal for scratch-pad, push-down stacks, buffer memories, and other internal memory applications in which cost and performance requirements dictate a wide data path in favor of word depth.
Part No. 82S09
Datasheet 82S09 Download
Manufacturer
Signetics
Description 576-BIT BIPOLAR RAM
Buy Stock & Price
82S09 datasheet page 1 preview

DESCRIPTION

Where parity is not monitored, the ninth bit can be used as a flag or status indicator for each word stored. The 82S09 is fully TTL compatible, and features open collector outputs, chip enable input, and a very low current PNP input structure to enhance memory expansion. During WRITE operation, the logic state of the device output follows the complement of the data input being written. This feature allows faster execution of WR ITEREAD cycles, enhancing the performance of systems utilizing indirect addressing modes, and/or requ iring immediate verification following a WRITE cycle. The 82S09 is available in the commercial and military temperature ranges. For the commercial temperature range (DoC to +75°C) specify N82S09, I. For the military temperature range (-55°C to +125°C) specify S82S09, I.

FEATURES

● ORGANIZATION - 64 X 9
● ADDRESS ACCESS TIME: S82S09 - 80ns, MAXIMUM N82S09 - 45ns, MAXIMUM
● WRITE CYCLE TIME: S82S09 - 70ns, MAXIMUM N82S09 - 45ns, MAXIMUM
● POWER DISSIPA...
82S09 page 2 preview 82S09 page 3 preview