82S09 Overview
Description
The 82S09 is a 576-Bit, Schottky clamped TTL, random access memory, organized as 64X9. This organization allows byte manipulation of data, including parity.
Key Features
- ORGANIZATION
- ADDRESS ACCESS TIME: S82S09 - 80ns, MAXIMUM N82S09 - 45ns, MAXIMUM
- WRITE CYCLE TIME: S82S09 - 70ns, MAXIMUM N82S09 - 45ns, MAXIMUM
- POWER DISSIPATION
- 1.3mW/BIT TYPICAL
- OUTPUT FOLLOWS COMPLEMENT OF DATA INPUT DURING WRITE
- ON-CHIP ADDRESS DECODING
- OPEN COLLECTOR OUTPUTS
- CHIP ENABLE FOR WORD EXPANSION
