Silicon Integrated System SIS5501
the SiS5501, 5502, and 5503 provides fully integrated support for the Pentium/P54C PCI/ISA system. The chipset is developed by using a very high level of function integration and system partitioning. With the SiS5501, SiS5502, and SiS5503 chipset, only 12 TTLs (include 3 DRAM address buffer) are required to implement a low cost, high performance, Pentium/P54C PCI/ISA system.| Part No. | SIS5501 |
|---|---|
| Datasheet | SIS5501 Download |
| Manufacturer | Silicon Integrated System |
| Description | PCI/ISA Cache Memory Controller |
| Buy | Stock & Price |
FEATURES
●●
●
● Supports the 510\60, 567\66, 735\90, 815\100 MHz and 75 MHz Pentium Processor Supports M1 and Other Pentium Compatible CPU Supports the Pipelined Address Mode of the Pentium or the P54C Processor Integrated Second Level ( L2 ) Cache Controller - Write Through and Write Back Cache Modes - 8 bits or 7 bits Tag with Direct Mapped Organization - Supports Standard and Burst SRAMs - Supports 64 KBytes to 2 MBytes Cache Sizes - Cache Read/Write Cycle of 3-2-2-2 or 4-2-2-2 Using Standard SRAMs at 66 MHz - Cache Read/Write Cycle of 3-1-1-1 Using Burst SRAMs at 66 MHz
● Integrated DRAM Controller - Supports 8 Banks of SIMMs up to 512 MBytes of Cacheable Main Memory - Supports " Table- Free " DRAM Configuration - Concurrent Write Back - CAS#-before-RAS# Transparent DRAM Refresh - Supports 256K/512K/1M/2M/4M/16M xN 70ns Fast Page Mode and EDO DRAM - The Fastest Burst Cycle Speed for FP and EDO are 6-3-3-3 and 6-2-2-2 respectively - Programmable CAS# driving Current - Programmable...
