SI53312
Overview
The Si53312 is an ultra low jitter ten output differential buffer with pin-selectable output clock signal format and divider selection. The Si53312 features a 2:1 mux, making it ideal for redundant clocking applications.
- 10 differential or 20 LVCMOS outputs
- Low output-output skew: <70 ps
- Ultra-low additive jitter: 45 fs rms
- Low propagation delay variation:
- Wide frequency range: <400 ps dc to 1.25 GHz
- Independent VDD and VDDO :
- Any-format input with pin selectable 1.8/2.5/3.3 V output formats: LVPECL, Low Power
- Excellent power supply noise
