SI53312 Overview
The Si53312 is an ultra low jitter ten output differential buffer with pin-selectable output clock signal format and divider selection.
SI53312 Key Features
- 10 differential or 20 LVCMOS outputs- Low output-output skew: <70 ps
- Ultra-low additive jitter: 45 fs rms
- Low propagation delay variation
- Wide frequency range
- Independent VDD and VDDO
- Any-format input with pin selectable 1.8/2.5/3.3 V
- Excellent power supply noise
- 2:1 mux with hot-swappable inputs
- Asynchronous output enable
- Small size: 44-QFN (7 mm x 7 mm)