Description
These jitter attenuating clock multipliers combine fourth-generation DSPLL and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance.
Features
- Generates any combination of output.
- frequencies from any input frequency.
- Input frequency range:.
- Differential: 8 kHz to 750 MHz.
- LVCMOS: 8 kHz to 250 MHz.
- Output frequency range:.
- Differential: up to 712.5 MHz.
- LVCMOS: up to 250 MHz.
- Ultra-low jitter:.
SI5342 Datasheet
