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Si5316 - PRECISION CLOCK JITTER ATTENUATOR

Overview

Si5316 PRECISION CLOCK JITTER ATTENUATOR.

Key Features

  • Fixed frequency jitter attenuator.
  • Dual clock inputs with integrated with selectable clock ranges at clock select mux 19, 38, 77, 155, 311, and 622 MHz (710 MHz max).
  • One clock input can be 1x, 4x, or 32x the frequency of the second.
  • Support for SONET, 10GbE, clock input 10GFC, and corresponding FEC.
  • Single clock output with rates selectable signal format:.
  • Ultra-low jitter clock output with LVPECL, LVDS, CML, CMOS jitter generation as low as 0.3 psRMS.