49LF004B
Overview
- SST49LF004B: 512K x8 (4 Mbit)
- Conforms to Intel LPC Interface Specification 1.1 - Supports Single-Byte LPC Memory and Firmware Memory Cycle Types
- Flexible Erase Capability - Uniform 4 KByte sectors - Uniform 64 KByte overlay blocks - Chip-Erase for PP Mode Only
- Single 3.0-3.6V Read and Write Operations
- Superior Reliability - Endurance: 100,000 Cycles (typical) - Greater than 100 years Data Retention
- Low Power Consumption - Active Read Current: 6 mA (typical) - Standby Current: 10 µA (typical)
- Fast Sector-Erase/Byte-Program Operation - Sector-Erase Time: 18 ms (typical) - Block-Erase Time: 18 ms (typical) - Chip-Erase Time: 70 ms (typical) - Byte-Program Time: 14 µs (typical) - Chip Rewrite Time: 8 seconds (typical)
- Two Operational Modes - Low Pin Count (LPC) interface mode for in-system operation - Parallel Programming (PP) mode for fast production programming
- LPC Interface Mode - 5-signal LPC bus interface supporting byte Read and Write - 33 MHz clock frequency operation - WP# and TBL# pins provide hardware write protect for entire chip and/or top Boot Block - Block Locking Registers for individual block write-lock and lock-down protection - JEDEC Standard SDP Command Set - Data# Polling and Toggle Bit for End-of-Write detection - 5 GPI pins for system design flexibility - 4 ID pins for multi-chip selection
- Parallel Programming (PP) Mode - 11-pin multiplexed address and 8-pin data I/O interface - Supports fast programming in-system on programmer equipment
