• Part: U632H64
  • Description: PowerStore 8K x 8 nvSRAM
  • Manufacturer: Simtek
  • Size: 436.97 KB
Download U632H64 Datasheet PDF
Simtek
U632H64
U632H64 is PowerStore 8K x 8 nvSRAM manufactured by Simtek.
Features ‡ High-performance CMOS nonvolatile static RAM 8192 x 8 bits ‡ 25 ns Access Time ‡ 12 ns Output Enable Access Time ‡ ICC = 15 m A at 200 ns Cycle Time ‡ Automatic STORE to EEPROM on Power Down using external capacitor ‡ Hardware or Software initiated STORE (STORE Cycle Time < 10 ms) ‡ Automatic STORE Timing ‡ 105 STORE cycles to EEPROM ‡ 10 years data retention in EEPROM ‡ Automatic RECALL on Power Up ‡ Software RECALL Initiation (RECALL Cycle Time < 20 μs) ‡ Unlimited RECALL cycles from EEPROM ‡ Single 5 V ± 10 % Operation ‡ Operating temperature ranges: 0 to 70 °C -40 to 85 °C ‡ QS 9000 Quality Standard ‡ ESD characterization according MIL STD 883C M3015.7-HB (classification see IC Code Numbers) ‡ Ro HS pliance and Pb- free Package: SOP28 (330 mil) Pin Configuration VCAP A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 VCCX W HSB A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3 Power Store 8K x 8 nv SRAM Description The U632H64 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled. The U632H64 is a fast static RAM (25 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation) take place automatically upon power down using charge stored in an external 100 μF capacitor. Transfers from the EEPROM to the SRAM (the RECALL operation) take place automatically on power up. The U632H64 bines the high performance and ease of use of a fast SRAM with nonvolatile data integrity. STORE cycles also may be initiated under user control via a soft Pin Description ware sequence or via a...