XR16M554D Datasheet | Sipex Corporation

XR16M554/554D 1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO .. MAY 2008 REV. 1.0.0 GENERAL DESCRIPTION The XR16M554 (M554) is a quad Universal Asynchronous Receiver and Transmitter (UART) with 16 bytes of transmit and receive FIFOs, selectable receive FIFO trigger levels and data rates of up to 4 Mbps at 3.3 V. Each UART has a set of registers that provide the user with operating status and control, receiver error indications, and modem serial interface controls. An internal loopback capability allows onboard diagnostics. The M554 is available in a 48pin QFN, 64-pin LQFP, 68-pin PLCC and 80-pin LQFP packages. The 64-pin and 80-pin packages only offer the 16 mode interface, but the 48- and 68pin packages offer an additional 68 mode interface which allows easy integration with Motorola processors. The XR16M554IV (64-pin) offers three state interrupt output while the XR16M554DIV provides continuous interrupt output. The XR16M554 is patible with the industry standard ST16C554. Features - Pin-to-pin patible with ST16C454, ST16C554, TI’s TL16C554A and NXP’s SC16C554B - Intel or Motorola Data Bus Interface select - Four independent UART channels - - Register Set patible to 16C550 Data rates of up to 4 Mbps at 3.3 V, 3.125 Mbps at 2.5 V and 2 Mbps at 1.8 V 16 byte Transmit FIFO 16 byte Receive FIFO with error tags 4 Selectable RX FIFO Trigger Levels Full modem interface - - - - - 1.62V to 3.63V supply operation - Crystal oscillator or external clock input APPLICATIONS - Portable Appliances - Telemunication Network Routers - Ethernet Network Routers - Cellular Data Devices - Factory Automation and Process Controls FIGURE 1. XR16M554 BLOCK DIAGRAM 1.62 V to 3.6 V VCC GND UART Channel A UART 16 Byte TX FIFO Regs TX & RX BRG 16 Byte RX FIFO TXB, RXB, DTRB#, DSRB#, RTSB#, CTSB#, CDB#, RIB# TXC, RXC, DTRC#, DSRC#, RTSC#, CTSC#, CDC#, RIC# TXD, RXD, DTRD#, DSRD#, RTSD#, CTSD#, CDD#, RID# XTAL1 XTAL2 A2:A0 D7:D0 IOR# IOW# CSA# CSB# CSC# CSD#...