Si53325 Description
Si53320-28 Data Sheet Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz The Si53320 28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications.
Si53325 Key Features
- Ultra-low additive jitter: 50 fs rms
- Built-in LDOs for high PSRR performance
- Up to 10 LVPECL Outputs
- Any-format Inputs (LVPECL, Low-power
- Wide frequency range: dc to 1250 MHz
- Output Enable option
- Multiple configuration options
- Dual Bank option
- 2:1 Input Mux operation
- RoHS pliant, Pb-free