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Si53301 - Ultra-Low Additive Jitter Fanout Clock Buffers

General Description

Input Input MUX Output Glitch- LOS less Output Switch1 OE Option Synchro- Clk Dividnous OE1 er Option Si53301-B-GM 6 output universal buffer Yes 2 6 Diff / 12 Yes with 2:1 input mux SE Yes Per Bank Yes Per Bank Si53302-B-GM 10 output universal buffer Yes 2 10 Diff / 20 Yes with 2:1

Key Features

  • include independent (synchronous) output enable, glitchless switching, LOS monitor of input clocks, output clock division, and built-in format translation. These buffers can be paired with the Si534x clocks and jitter attenuators, the Si5332 clocks, and the Si5xx oscillators to deliver end-to-end clock tree performance. KEY.

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📁 Similar Datasheet

Part Number Description Manufacturer
SI53301 1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR Silicon Laboratories
SI5330 LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR Silicon Laboratories
SI53302 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR Silicon Laboratories
SI53303 DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR Silicon Laboratories
SI53304 1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR Silicon Laboratories

Other Datasheets by Skyworks Solutions

Part Number Description
Si53302 Ultra-Low Additive Jitter Fanout Clock Buffers
Si53303 Ultra-Low Additive Jitter Fanout Clock Buffers
Si53304 Ultra-Low Additive Jitter Fanout Clock Buffers
Si53305 Ultra-Low Additive Jitter Fanout Clock Buffers
Si53306 Ultra-Low Additive Jitter Fanout Clock Buffers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Si5330x Data Sheet Ultra-Low Additive Jitter Fanout Clock Buffers with up to 10 Universal Outputs from Any-Format Input and Wide Frequency Range from 1 MHz to 725 MHz The Si5330x family of Universal/Any-format fanout buffers is ideal for clock distribution (1 MHz minimum) and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range. Built-in LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si5330x family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux.