P8M6412YLG Description
The P8M646YLG, P16M6412YLG, are high performance dynamic random-access 64MB and 128MB modules respectively. These modules are organized in a x64 configuration, and utilize quad bank architecture with a synchronous interface. All signals are registered on the positive edge of the clock signals CK0 through CK3.
P8M6412YLG Key Features
- PC-100 and PC133 patible JEDEC
- Standard 168-pin , dual in-line memory Module (DIMM) TSOP ponents. Single 3.3v +.3v power supply. Nonbuffered fully sync
- 8Mx12 SDRAM TSOP 12
- 8Mx12 SDRAM TSOP