P8M6412YLG Overview
Description
The P8M646YLG, P16M6412YLG, are high performance dynamic random-access 64MB and 128MB modules respectively. These modules are organized in a x64 configuration, and utilize quad bank architecture with a synchronous interface.
Key Features
- PC-100 and PC133 Compatible JEDEC – Standard 168-pin , dual in-line memory Module (DIMM) TSOP components
- Single 3.3v +.3v power supply
- Nonbuffered fully synchronous; all signals measured on positive edge of system clock
- Internal pipelined operation; column address can be changed every clock cycle
- Quad internal banks for hiding row access/precharge
