DESCRIPTION
PIN CONFIGURATION SOP-8 FEATURE l● -30V/-9.2A, RDS(ON) =-22mΩ (Typ.) @VGS =-10V l● -30V/-7.0A, RDS(ON) = 30mΩ @VGS = -4.5V l● Super high density cell design for extremely low RDS(ON) l● Exceptional on-resistance and maximum DC current capability l● SOP-8 package design PART MARKING SOP-8 Y：Year Code A：Preduce Code B：Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp. STP4435 2007. V1 STP4435 P Channel Enhancement Mode MOSFET -10A ABSOULTE MAXIMUM RATINGS
(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature VGSS ID IDM IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical -30 ±20 -10.0 -7.0 -50 -2.3 2.8 1.8 -55/150 -55/150 70 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp.
Stanson Technology
