FEATURES
► HVCMOS technology for high performance ► Integrated bleed resistors on the outputs ► 3.3V or 5.0V CMOS input logic level ► 20MHz data shift clock frequency ► Very low quiescent power dissipation - 10µA ► Low parasitic capacitance ► DC to 10MHz analog signal frequency ► -60dB typical off-isolation at 5.0MHz ► CMOS logic circuitry for low power ► Excellent noise immunity ► Cascadable serial data register with latches ► Flexible operating supply voltages GENERAL DESCRIPTION
The Supertex Data is input into an 8-bit shift register that can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, the latch enable bar should be left high until all bits are clocked in. Data is clocked in during the rising edge of the clock. Using HVCMOS technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., VPP/VNN: +40V/-140V, +90V/-90V, and +140V/-40V.
Supertex
