EV12AD550 Datasheet | Teledyne Technologies

EV12AD550 Dual 12bits 1.5GSps ADC Space Grade OVERVIEW EV12AD550 is a dual S-band capable 12bit ADC intended for space applications that is built using a true single core architecture providing high spectral purity. With a 3d B input bandwidth up to 4.3GHz it allows for direct digitization in S-band without frequency down-conversion. Synthetic Aperture Radar systems will also be able to operate this ADC with reduced dynamic range at frequencies beyond 5GHz without frequency downconversion. This device includes a multiple ADC chained synchronization feature. This would help designing large array of synchronous ADC for example in active antenna array or MIMO systems. Multichannel applications will benefit from a cross-talk isolation between inputs in excess of 80d B and Noise Power Ratio performance of 50d B in the first Nyquist zone. This device es in a hermetic flip chip CCGA323 package in Aluminum Nitride with improved thermal performance and is planned for QML-V and ESCC certification. APPLICATIONS - Earth observation SAR payload - Telemunication satellite payload - Satellite data links - Satellite altimeter - Satellite TWTA pensation system - Satellite to satellite laser data links Features Dual channel 12 bits 1.5GSps ADC - Single core architecture ADC per channel - Differential analog input voltage: 1Vppd - Full Power Input bandwidth (-3d B): 4.3GHz - Differential clock input - Power consumption: 2.3W / channel - Power supplies: Single Rail 3.4V or Dual rail 3.4V/2.5V - Low latency output interface: LVDS DEMUX 1:1 or 1:2 - Package: Hermetic CCGA323 21x21mm / 1mm pitch, Aluminum nitride material - SPI configuration with space protection control - Multiple ADC chained synchronization - Test mode: ramp, flash, PRBS - Control bit: parity, in-range, trigger - Clock input at 3GHz PERFORMANCE @...