TD72403L10DB - CMOS PARALLEL FIFO

Datasheet Summary

Description

The TD72403 is an asynchronous, high performance First-ln/First-Out (FIFO) memory organized 64 words by 4 bits.

The IDT72403 has an Output Enable (OE) pin.

The FlFO accepts 4-bit data at the data input (D0-D3).

Features

First-ln/First-Out Dual-Port memory.
64 x 4 organization.
RAM-based FIFO with low falI-through time.
Low-power consumption.
Active: 175 mW (typ. ).
Maximum shift frequency.
10 MHz.
High data output drive capability.
Asynchronous and simultaneous read and write.
Output Enable pin to enable output data.
High-speed data communications.

TELEDYNE

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Datasheet Details

Part number	TD72403L10DB
Manufacturer	TELEDYNE
File Size	0.95 MB
Description	CMOS PARALLEL FIFO
Datasheet	TD72403L10DB Datasheet
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TELEDYNE HIREL ELECTRONICS PRODUCT FAMILY TD72403L10DB CMOS PARALLEL FIFO 64 x 4-BIT, 10 MHZ Product Specification February 2021 Functional Description The TD72403 is an asynchronous, high performance First-ln/First-Out (FIFO) memory organized 64 words by 4 bits. The IDT72403 has an Output Enable (OE) pin. The FlFO accepts 4-bit data at the data input (D0-D3). The stored data is stacked on a first-in/ firstout basis. The Shift Out (SO) signal causes the data at the next to last word to be shifted to the output while all other data moves down one location in the stack. The Input Ready (IR) signal functions as a flag indicating when the input is ready for new data (IR = HIGH) or to signal when the FIFO stack is full (IR = LOW).

Published: May 6, 2024 |