Download the TC74AC10P datasheet PDF.
This datasheet also covers the TC74AC10F variant, as both devices belong to the same triple 3-input nand gate family and are provided as variant models within a single manufacturer datasheet.
Key Features
High speed: tpd = 5.0 ns (typ. ) at VCC = 5 V.
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
High noise immunity: VNIH = VNIL = 28% VCC (min).
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω transmission lines.
Balanced propagation delays: tpLH ∼.
tpHL.
Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
Pin and function compatible with 74F10
Pin Assignment
TC74AC10P TC74AC10F
W.
Note: The manufacturer provides a single datasheet file (TC74AC10F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.
Full PDF Text Transcription for TC74AC10P (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
TC74AC10P. For precise diagrams, and layout, please refer to the original PDF.
TC74AC10P/F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC10P, TC74AC10F Triple 3-Input NAND Gate The TC74AC10 is an advanced high speed CMOS 3-INPUT N...
View more extracted text
-Input NAND Gate The TC74AC10 is an advanced high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 5.0 ns (typ.
TC74AC10P Datasheet
