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TC74AC138F - 3-TO-8 LINE DECODER

Key Features

  • High speed: tpd = 5.9 ns (typ. ) at VCC = 5 V Low power dissipation: ICC = 8 µA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. Balanced propagation delays: tpLH ∼.
  • tpHL Wide operating voltage range: VCC (opr) = 2 to 5.5 V Pin and function compatible with 74F138 TC74AC138FN e DataShe DataSheet4U. com.

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Full PDF Text Transcription for TC74AC138F (Reference)

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www.DataSheet4U.com TC74AC138P/F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC138P,TC74AC138F,TC74AC138FN,TC74AC138FT 3-to-8 Line Decoder The TC...

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74AC138P,TC74AC138F,TC74AC138FN,TC74AC138FT 3-to-8 Line Decoder The TC74AC138 is an advanced high speed CMOS 3-to-8 LINE DECODER fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G 2 A or G2B is held high, decoding function is inhibited and all outputs go high.