TC74AC521FW Description
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It pares two 8-bit binary or BCD words applied inputs P0~P7, and inputs Q0~Q7, and indicates whether or not they are equal. A signal active low enable is provided to facilitate cascading of several packages to pare of words greater than 8 bits.
TC74AC521FW Key Features
- High speed: tpd = 6.4 ns (typ.) at VCC = 5 V
- Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 to 5.5 V
- Pin and function patible with 74F521