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TC74ACT08FN - Quad 2-Input AND Gate

Download the TC74ACT08FN datasheet PDF. This datasheet also covers the TC74ACT08F variant, as both devices belong to the same quad 2-input and gate family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • High speed: tpd = 4.7 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min).
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Pin and function compatible with 74F08 Note: xxxFN (JEDEC SOP) is not available in Japan. TC74ACT08P TC74ACT08F TC74ACT08F.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74ACT08F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
TC74ACT08F Quad 2-Input AND Gate Toshiba
TC74ACT08P Quad 2-Input AND Gate Toshiba
TC74ACT04F Hex Inverter Toshiba
TC74ACT04FT Hex Inverter Toshiba
TC74ACT04P Hex Inverter Toshiba

Other Datasheets by Toshiba

Part Number Description
TC74ACT08FT Quad 2-Input AND Gate
TC74ACT00F Quad 2-Input NAND Gate
TC74ACT00FN QUAD 2 INPUT NAND GATE
TC74ACT00FT Quad 2-Input NAND Gate
TC74ACT00P Quad 2-Input NAND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74ACT08P/F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT08P,TC74ACT08F,TC74ACT08FN,TC74ACT08FT Quad 2-Input AND Gate The TC74ACT08 is an advanced high speed CMOS 2-INPUT AND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 4.7 ns (typ.