TC9446F
Overview
- Dolby digital (AC-3) or MPEG2 audio decode Acceptable bit rate upto 640 kbps Audio interface 4 output port, 2 input port (2 port of LRCK and BCK) DIR (digital audio interface receiver) built-in DIT (digital audio interface transmitter) built-in DIR and DIT are available upto 96 kHz sampling of 2 channel * *
- Operating clock: DLL oscillator upto 6th times for DSP clock Instruction cycle: 20 ns/1 instruction at 50 MIPS operation DSP Processor: 24 bit × 24 bit + 51 bit multiplier and adder, 51 bit ALU Data bus: 24 bit × 3 Data RAM: 12 k word Coeficient ROM: 4 k word Program ROM: 12 k word Program RAM: 128 word *
- MCU interface: Serial interface or I2C bus interface Others It is possible to connect external RAM, 256 k or 1 M SRAM External interruption input terminal Flag input terminal: 4 inputs General-purpose output port: 8 outputs (The ports can be used as interrupt outputs to MCU and logic control outputs.) incorrect operation detect * *
- Operating Voltage: 3.0 ± 0.3 V In CMOS structure and high-speed processing 100 pin flat package design Note 1: “Dolby”, “Pro Logic”, and the double-D symbol are trademarks of Dolby Laboratories. Note 2: “DTS” and “DTS Digital Surround” are registered trademarks of Digital Theater Systems, Inc. Note 3: Since this product has a weak terminal in serge voltage, please advise handling it enough. Weight: 1.57 g (typ.) 1
