TC9446FG - Audio Digital Processor

of Pin Functions Reset signal input terminal (L: reset, H: normal operation) Mode select input for MCU interface (L: serial, H: I C bus) 2 Remarks Pull-up resistor, Schmitt input Pull-down resistor, Schmitt input MICS MILP MIDIO MICK MIACK FI0 FI1 FI2 FI3 RQ SS I I I/O I O I I I I I Chip select

• Dolby digital (AC-3) or MPEG2 audio decode Acceptable bit rate upto 640 kbps Audio interface 4 output port, 2 input port (2 port of LRCK and BCK) DIR (digital audio interface receiver) built-in DIT (digital audio interface transmitter) built-in DIR and DIT are available upto 96 kHz sampling of 2 channel.
• Operating clock: DLL oscillator upto 6th times for DSP clock Instruction cycle: 20 ns/1 instruction at 50 MIPS operation DSP Processor: 24 bit ×.