TMP91CY28
Overview
- Instruction set is upwardly assembly-code compatible. 16-Mbyte linear address space Architecture based on general-purpose registers and register banks 16-bit multiply/divide instructions and bit transfer/arithmetic instructions 4-channel micro DMA (1.6 Ps/2 bytes at 10 MHz) (2) Minimum instruction execution time: 400 ns (at 10 MHz) (3) 8-Kbyte on-chip RAM 256-Kbyte on-chip ROM (4) External memory expansion *
- 16-Mbyte off-chip address space for code and data External bus interface with dynamic bus sizing for 8-bit and 16-bit data ports (5) 4-channel 8-bit timer (6) 2-channel 16-bit timer (7) 4-channel general-purpose serial interface
- Both UART and synchronous transfer modes are supported.
