TMP91CY28FG
Overview
- Instruction set is upwardly assembly-code compatible.
- 16-Mbyte linear address space
- Architecture based on general-purpose registers and register banks
- 16-bit multiply/divide instructions and bit transfer/arithmetic instructions
- 4-channel micro DMA (1.6 Ps/2 bytes at 10 MHz) (2) Minimum instruction execution time: 400 n
