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74HC238D - 3-to-8 Line Decoder

General Description

2.

The 74HC238D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Key Features

  • (1) High speed: tpd = 14 ns (typ. ) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operati.

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Datasheet Details

Part number 74HC238D
Manufacturer Toshiba
File Size 211.43 KB
Description 3-to-8 Line Decoder
Datasheet download datasheet 74HC238D Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CMOS Digital Integrated Circuits Silicon Monolithic 74HC238D 74HC238D 1. Functional Description • 3-to-8 Line Decoder 2. General The 74HC238D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs (Y0 - Y7) will go high. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all the outputs go low. G1, G2A, and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems.