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TC55V8512J - (TC55V8512J/FT) 8-Bit CMOS SRAM

General Description

The TC55V8512J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 524,288 words by 8 bits.

Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it operates from a single 3.3 V power supply.

Key Features

  • Fast access time (the following are maximum values) TC55V8512J/FT-12:12 ns TC55V8512J/FT-15:15 ns Low-power dissipation (the following are maximum values) Cycle Time Operation (max) 12 170 15 140 20 130 25 110 ns mA.
  • Single power supply voltage of 3.3 V ± 0.3 V Fully static operation All inputs and outputs are LVTTL compatible Output buffer control using OE Package: SOJ36-P-400-1.27 (J) (Weight: 1.35 g typ) TSOP II44-P-400-0.

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Datasheet Details

Part number TC55V8512J
Manufacturer Toshiba
File Size 161.58 KB
Description (TC55V8512J/FT) 8-Bit CMOS SRAM
Datasheet download datasheet TC55V8512J Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TC55V8512J/FT-12,-15 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION The TC55V8512J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 524,288 words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode, and output enable ( OE ) provides fast memory access. This device is well suited to cache memory applications where high-speed access and high-speed storage are required. All inputs and outputs are directly LVTTL compatible.