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TC58BYG2S0HBAI4 Datasheet 4 GBIT (512M x 8 BIT) CMOS NAND E2PROM

Manufacturer: Toshiba

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Datasheet Details

Part number TC58BYG2S0HBAI4
Manufacturer Toshiba
File Size 347.71 KB
Description 4 GBIT (512M x 8 BIT) CMOS NAND E2PROM
Datasheet download datasheet TC58BYG2S0HBAI4 Datasheet

General Description

The TC58BYG2S0HBAI4 is a single 1.8V 4 Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 128) bytes × 64 pages × 2048blocks.

The device has a 4224-byte static register which allows program and read data to be transferred between the register and the memory cell array in 4224-bytes increments.

The Erase operation is implemented in a single block unit (256 Kbytes + 8 Kbytes: 4224 bytes × 64 pages).

Overview

TC58BYG2S0HBAI4 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 4 GBIT (512M × 8 BIT) CMOS NAND.

Key Features

  • Organization Memory cell array Register Page size Block size x8 4224 × 128K × 8 4224 × 8 4224 bytes (256K + 8K) bytes.
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Read, Multi Page Program, Multi Block Erase, ECC Status Read.
  • Mode control Serial input/output Command control.
  • Number of valid blocks Min 2008 blocks Max 2048 blocks.
  • Power supply VCC = 1.7V to 1.95V.
  • Access time Cell array to.

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