Datasheet Summary
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TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1 GBIT (128M × 8 BITS) CMOS NAND EEPROM DESCRIPTION
The TC58NVG0S3A is a single 3.3-V 1G-bit (1,107,296,256 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND EEPROM) organized as (2048 + 64) bytes × 64 pages × 1024 blocks. The device has a 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages). The TC58NVG0S3A is a serial-type memory device which utilizes the I/O...