TC59SM704AFTL Description
Fully synchronous operations are referenced to the positive edges of clock input and can transfer data up to 143M words per second. These devices are controlled by mands setting. Each bank are kept active so that DRAM core sense amplifiers can be used as a cache.
TC59SM704AFTL Key Features
- TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor d