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TC74HC138AFN Datasheet 3-to-8 Line Decoder

Manufacturer: Toshiba

Overview: TC74HC138AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC138AP, TC74HC138AF 3-to-8 Line Decoder The TC74HC138A is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high. G1, G2A , and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. All inputs are equipped with protection circuits against static discharge or transient excess voltage.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • High speed: tpd = 16 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability:.

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