Datasheet Details
| Part number | TC74HC138AP |
|---|---|
| Manufacturer | Toshiba |
| File Size | 223.33 KB |
| Description | 3-TO-8 Line Decoder |
| Datasheet | TC74HC138AP TC74HC138 Datasheet (PDF) |
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Overview: TC74HC138AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC138AP, TC74HC138AF 3-to-8 Line Decoder The TC74HC138A is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high. G1, G2A , and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | TC74HC138AP |
|---|---|
| Manufacturer | Toshiba |
| File Size | 223.33 KB |
| Description | 3-TO-8 Line Decoder |
| Datasheet | TC74HC138AP TC74HC138 Datasheet (PDF) |
|
|
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| Part Number | Description |
|---|---|
| TC74HC138AF | 3-TO-8 Line Decoder |
| TC74HC138AFN | 3-TO-8 Line Decoder |
| TC74HC132AF | QUAD 2-INPUT SCHMITT GATE |
| TC74HC132AFN | QUAD 2-INPUT SCHMITT GATE |
| TC74HC132AP | QUAD 2-INPUT SCHMITT GATE |
| TC74HC133AF | 13-Input NAND Gate |
| TC74HC133AP | 13-Input NAND Gate |
| TC74HC139AF | DUAL 2 TO 4 LINE DECODER |
| TC74HC139AFN | DUAL 2 TO 4 LINE DECODER |
| TC74HC139AP | DUAL 2 TO 4 LINE DECODER |