TC74HC245AP Datasheet | Toshiba

TC74HC245AP,TC74HC245AF,TC74HC640AP,TC74HC640AF CMOS Digital Integrated Circuits Silicon Monolithic TC74HC245AP,TC74HC245AF,TC74HC640AP, TC74HC640AF 1. Functional Description - Octal Bus Transceiver TC74HC245AP/AF:3-State, Non-Inverting TC74HC640AP/AF:3-State, Inverting 2. General The TC74HC245A, TC74HC640A are high speed CMOS OCTAL BUS TRANSCEIVERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. They are intended for two-way asynchronous munication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input (G) can be used to disable the device so that the busses are effectively isolated. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (Note) (1) High speed: tpd = 10 ns (typ.) at VCC = 5.0 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 - (3) High noise immunity: VNIH = VNIL = 28 % VCC (min) (4) Output drive capability: 15 LSTTL loads (5) Output current: |IOH|/IOL = 6 m A (min) (VCC = 4.5 V) (6) Balanced propagation delays: t PLH ≈ t PHL (7) Wide operating voltage range: VCC(opr) = 2 V to 6 V (8) Pin and function patible with 74LS245/640. Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pins must have their input levels fixed by means of pull-up or pull-down resistors. 4. Packaging DIP20 SOP20 ©2022 Toshiba Electronic Devices & Storage Corporation Start of mercial production 1986-05 2022-03-04 Rev.1.0 TC74HC245AP,TC74HC245AF,TC74HC640AP,TC74HC640AF 5. Pin Assignment TC74HC245AP,TC74HC245AF TC74HC640AP,TC74HC640AF 6. Marking TC74HC245AF TC74HC640AP TC74HC640AF ©2022 Toshiba Electronic Devices & Storage Corporation 2022-03-04...