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TC74HC280AF Datasheet 9-bit Parity Generator/checker

Manufacturer: Toshiba

Overview: TC74HC280AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC280AP, TC74HC280AF 9-Bit Parity Generator/Checker The TC74HC280A is a high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The TC74HC280A is posed of nine data inputs A thru I and odd/even parity outputs Σ ODD and Σ EVEN. The odd parity output is high when an odd number of data inputs are high. The even parity output is high when an even number of data inputs are high. The word-length capability is easily expanded by cascading. All inputs are equipped with protection circuits against static discharge or transient excess voltage.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • High speed: tpd = 22 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 6 V.
  • Pin and function compatible with 74LS280 Pin Assignment TC74HC280AP TC74HC280.

More Datasheets from Toshiba

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TC74HC280AF Distributor