TC74VHC367FN Datasheet | Toshiba

TC74VHC367,368F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC367F,TC74VHC367FN,TC74VHC367FT,TC74VHC367FK TC74VHC368F,TC74VHC368FN,TC74VHC368FT,TC74VHC368FK Hex Bus Buffer TC74VHC367F/FN/FT TC74VHC368F/FN/FT Non-Inverted, 3-State Outputs Inverted, 3-State Outputs Note: The JEDEC SOP (FN) is not available in Japan. TC74VHC367F, TC74VHC368F The TC74VHC367 and 368 are advanced high speed CMOS HEX BUS BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. They contain six buffers; four buffers are controlled by an enable input ( G1 ), and the other two buffers are controlled by another enable input ( G2 ). The outputs of each buffer group are enabled when G1 and/or G2 inputs are held low; if held high, these outputs are in a high impedance state. The TC74VHC367 is a non-inverting output type, while the TC74VHC368 is an inverting output type. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features - High speed: tpd = 3.8 ns (typ.) at VCC = 5 V - Low power dissipation: ICC = 4 μA (max) at Ta = 25°C - High noise immunity: VNIH = VNIL = 28% VCC (min) - Power down protection is provided on all inputs. - Balanced propagation delays: tp LH ∼- tp HL - Wide operating voltage range: VCC (opr) = 2 V to 5.5 V - Low noise: VOLP = 0.8 V (max) - Pin and function patible with 74ALS367/368 TC74VHC367FN, TC74VHC368FN TC74VHC367FT, TC74VHC368FT TC74VHC367FK, TC74VHC368FK Weight SOP16-P-300-1.27A SOL16-P-150-1.27 TSSOP16-P-0044-0.65A VSSOP16-P-0030-0.50 : 0.18 g (typ.) : 0.13 g (typ.) : 0.06 g (typ.) : 0.02 g (typ.) 1 2007-10-01 Pin Assignment TC74VHC367 G1...